RDNA3 chiplet structure separates the memory controller? Finding information in Linux patches

Some of the secrets of the chiplet structure applied to the AMD RDNA3 GPU architecture have been revealed. In the Linux patch updated earlier this month, some information related to NAVI31 was revealed, and it is said that information that might predict the chiplet structure was included.

This information can guess how the chiplet structure of the RDNA3 GPU architecture is separated and connected. The news is that the controller is a separate chiplet structure.

The Ryzen CPU, which has already introduced the chiplet structure, is judged in a similar way by adopting a structure in which the I/O die including the memory controller is separated.

However, unlike the latest Ryzen CPUs designed with one I/O die, RDNA3 designs MCD by 32 bits and produces them as individual die, so it is thought to be closer to the chiplet structure applied to the early Ryzen series.

It is a disappointing structure to take advantage of the true chiplet advantage, but since the memory controller and L2 or LLC can be separated from the main die, it is clear that it is a structure that helps reduce production costs and improve yield for AMD, which has to use only the latest process. The highly anticipated combination of two or more middle-class GPUs is not likely to be realized in this generation.

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